FIELD OF THE INVENTION
The invention relates to an integrated circuit for producing two output clock signals, in which first logic levels of the output clock signals do not overlap in time.
Such circuits are required, for example, for actuating shift registers, in which a plurality of register elements are arranged in a series circuit, and are connected to one another via switching elements. It is thereby important that the switching element on the input side and the switching element on the output side of one of the register elements are not both switched on at any time. It is thus advantageous for the two switching elements each to be actuated by different clocks, the switching element being switched on at a first clock signal logic level, and being switched off at the other logic level. In order to avoid both switching elements from being switched on at the same time, it is essential that the first logic levels of the two clock signals do not overlap in time.